Hoover Institution (Stanford, CA) — As dollars from the CHIPS and Science Act flow to strengthen the US semiconductor industry, senior leaders from the US government, industry, academia, and international partners met at the Hoover Institution to discuss current opportunities and the field’s next steps at a forum hosted by the Stanford Emerging Technology Review on May 22.
The Stanford Emerging Technology Review—a university-wide partnership between Stanford University’s Hoover Institution and School of Engineering– convenes Stanford scientists and engineers with Hoover fellows to explore policy challenges posed by ten emerging technological areas.
Almost two years after the passage of the CHIPS & Science Act, foundry construction, research programs, and other related efforts to strengthen domestic semiconductor manufacturing and technology are underway. Recently, independent analysts and industry groups have highlighted positive domestic successes stemming from the CHIPS Act, including leading-edge capacity. But, against the backdrop of those positive developments and the fanfare of the CHIPS & Science Act awards, have they put US industry on a sustainable economic path? What impact are US semiconductor policies having on its diplomatic efforts to build secure supply chains with international partners? These were the key questions explored.
Domestic discussions centered around the implementation of the CHIPS & Science Act at the Department of Commerce. US government representatives described the strategy for CHIPS Act awards – highlighting their thesis that combining public and private capital together will result in a more effective return for the taxpayer when compared with public funding alone. Those representatives highlighted how their negotiators have bargained heavily with potential applicants to strike the best possible deal for American taxpayers. You can find more information on the CHIPS strategy at the following link: CHIPS Strategic Vision.
Participants questioned whether the large ($39 billion) federal subsidies and tax credits for existing semiconductor firms would primarily create jobs and factories that were dependent on continued government subsidies – given the disproportionately high costs of operating fabs in the United States compared with other countries. US government representatives highlighted the economic and national security goals of the program, including a strong focus on resilient supply chains. Those representatives also highlighted the unique value proposition that the US brings: high-quality universities and significant industry ecosystem components.
Several participants highlighted challenges in growing the US semiconductor talent base including the need to reform immigration policies to bring high-skill foreign talent into the US, the high costs of small-scale hardware innovation / university research, the lack of certain demand for new engineers with high paying jobs, and the need to foster Science Technology Engineering and Math (STEM) education much earlier than the university level.
With respect to the CHIPS Act’s research funding, several participants highlighted the disconnects between manufacturing and innovation funding – questioning the strategy of doling out smaller grants without specific emphasis on scaling innovations. Participants highlighted the lack of awards with high growth potential as well as the negative incentives for large companies, which are the primary beneficiaries of CHIPS Act funding, to support the scaling of new companies that might compete with them later.
To all these challenges, participants presented a range of actionable recommendations that could be taken back to Washington including a more focused look at reducing regulatory burden and therefore the operating costs of new semiconductor fabs, an employee / student-centric approach to growing the talent base, and placing greater emphasis on scaling American innovation in the semiconductor sector.
International discussions focused on America’s diplomatic efforts to reduce barriers to foreign collaboration and create resilient global supply chains. US government representatives described several of the existing development and multi-lateral coordination efforts currently underway including the International Technology Security and Innovation Fund (ITSI), which was said to be focused on the assembly, testing, and packaging components of the semiconductor supply chain.
Diplomats from Asia and Europe present at the meeting indicated a polite tolerance for the major direct subsidies contained in the US CHIPS and Science Act, as many of their home nations already engage in subsidies to spur semiconductor development. Other participants warned of the short-sightedness of commercial subsidies and the pitfalls associated with an international subsidies race.
Here too, participants presented a range of potential paths forward including expanding international participation within the National Semiconductor Technology Center (NSTC) research efforts, increasing the number of ‘commerce to commerce’ exchanges between national development authorities, increasing dialogue between the development and security functions within the US government, and consolidating multilateral technology dialogue between US partners under a smaller number of forums.
For more information on the Stanford Emerging Technology Review and to read its inaugural report, click here.
